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Basic structure of semiconductor memory chip

Basic structure of semiconductor memory chip

  • Categories:Industry News
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  • Time of issue:2021-06-26 14:15
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(Summary description)The semiconductor memory chip is composed of a decoding drive circuit, a memory matrix, a reading and writing circuit, an address line, a data line, a control line, and a chip selection line. Among them, the decoding drive circuit, the storage matrix, and the read-write circuit belong to the core structure.

Basic structure of semiconductor memory chip

(Summary description)The semiconductor memory chip is composed of a decoding drive circuit, a memory matrix, a reading and writing circuit, an address line, a data line, a control line, and a chip selection line. Among them, the decoding drive circuit, the storage matrix, and the read-write circuit belong to the core structure.

  • Categories:Industry News
  • Author:
  • Origin:
  • Time of issue:2021-06-26 14:15
  • Views:

  The semiconductor memory chip is composed of a decoding drive circuit, a memory matrix, a reading and writing circuit, an address line, a data line, a control line, and a chip selection line. Among them, the decoding drive circuit, the storage matrix, and the read-write circuit belong to the core structure.

  The memory matrix is ​​used to store 0/1 codes, and the address line and data line are mainly used to connect the CPU and external devices. Now suppose that the CPU or external device gives an address indicating which storage unit of the storage matrix the data to be stored/fetched is in, and then goes through the decoding drive circuit to select the corresponding storage unit to complete the data storage/fetching.

  The address line is unidirectional, pointing to the memory by the CPU, or pointing to the memory by the controller of the I/O device. The data line is bidirectional. The capacity of the chip can be calculated from the address line and data line.

  The chip select line, also called the chip select signal, points out whether the address given by this save/fetch operation is the address of the memory chip.

  CS (chip select signal), CE (chip enable signal), low level means valid, high level means invalid, that is, if the chip select line signal is low, it means the data you want to store/retrieve Located in the chip where the chip select line is located.

  The read and write control line indicates whether the operation on the semiconductor chip is a read operation or a write operation. It can be represented by one line or two lines. If it is represented by one line, it is WE, and if it is represented by two lines, it is WE and OE.

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